T/CASAS 015-2022 Active

Scope: This document specifies the power cycle test method for silicon carbide metal oxide semiconductor field-effect transistors (SiC MOSFETs), including: test equipment, test procedures, and failure criteria. This document is applicable to power cycle tests of discrete SiC MOSFET devices without reverse-parallel Schottky diodes. Main technical content: Silicon carbide metal oxide semiconductor field-effect transistors (SiC MOSFETs) have characteristics such as high blocking voltage, high operating frequency, strong high-temperature resistance, low on-state resistance, and low switching loss, and are widely used in high-frequency and high-voltage power systems. With the continuous development of power electronics technology, more and more fields such as aerospace, aviation, oil exploration, nuclear energy, and communications urgently need electronic devices that can operate in extreme environments such as high temperatures and high frequencies. The power cycle test of SiC MOSFETs involves subjecting the device to repeated cycles of power-on heating and power-off cooling to accelerate the degradation of all bonding and interfaces between the device chip and the mounting surface. Whether the device can withstand the specified number of power cycle cycles under stress conditions is an important means of evaluating the reliability of the device in actual applications. Due to the capture and release mechanism of interface defects between SiO2 and SiC, the traditional power cycle test method for Si MOSFETs may result in deviations in monitoring parameters such as junction temperature due to the drift of the threshold voltage V_GS(th) of SiC MOSFET devices, thus affecting the accuracy of the power cycle test. This document provides a power cycle test method suitable for SiC MOSFET devices.