T/BDT 004-2024 Active Group standards

T/BDT 004-2024 RISC-V single-line debugging interface technical requirements

Publish Date: 2024-10-09 Implement Date: 2024-10-10 For services related to genuine standard inquiry, procurement, translation, and other related services in China, please Contact Us

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Basic Information

Standard Code: T/BDT 004-2024

Standard Type: Group standards

Standard Status: Active

is_force_gb: no

CCS Name: -

ICS Name: Comprehensive Application of Information Technology

Publish Date: 2024-10-09

Implement Date: 2024-10-10

Scope

Scope: This document specifies the debugging transmission protocol for the RISC-V single-wire debugging interface, as well as the debugging module and its operating methods. This document is applicable to the specification of RISC-V single-wire debugging and online debugging of microprocessors. Main technical content: In terms of basic structure, it mainly stipulates the debugging system of RISC-V. This includes a simple block diagram, functions, access methods, and communication methods. In terms of the debugging transmission protocol, it mainly stipulates the definition and transmission format of the debugging transmission protocol. This includes packet format, bit definition, debugging interface registers, and configuration examples. In terms of the debugging module, it mainly stipulates the operation, types, and applications of the debugging module. This includes description, debugging operations, types of debugging module registers, and operation examples.