T/CIE 116-2021 Fault tree analysis method and procedure of electronic components

Scope

This document establishes a method for constructing fault trees of electronic components based on failure physics and a fault tree analysis program. It describes the method of constructing a fault information database for electronic components based on fault trees.
This document is applicable to the construction of fault trees and failure path analysis of electronic components during the design, development, production, and use phases, as well as the identification of potential failure issues in electronic components during the design and application phases. The results can be used for quality zeroing analysis of electronic components, reliability design analysis, and application risk analysis.
The method described in this document is suitable for electronic components such as discrete semiconductor devices, semiconductor integrated circuits, hybrid integrated circuits, electromechanical components, and printed circuit boards.

Development Information

Referenced Standards

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