GB/T 46280.4-2025 Active National standards

GB/T 46280.4-2025 Specification for chiplet interconnection interface—Part 4:Physical layer technical requirements based on 2D package

Publish Date: 2025-08-19 Implement Date: 2026-03-01 For services related to genuine standard inquiry, procurement, translation, and other related services in China, please Contact Us

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Basic Information

Standard Code: GB/T 46280.4-2025

Standard Type: National standards

Standard Status: Active

is_force_gb: no

CCS Name: Microcircuit

ICS Name: Integrated circuits, microelectronics

Publish Date: 2025-08-19

Implement Date: 2026-03-01

Pages: 44 pages

Scope

This document specifies the physical layer technical requirements of the core-chip interconnect interface based on 2D packaging, including initialization and training processes, physical layer electrical specifications, redundancy mechanisms, interface physical layout, and related technical requirements for low-power control.
This document is applicable to the design, manufacture, and application of the core-chip interconnect interface.

Development Information

Word Count: 67 Thousand words Pages: 44 pages

Same series standard

GB/T 46280.1-2025 Specification for chiplet interconnection interface—Part 1:General principles GB/T 46280.2-2025 Specification for chiplet interconnection interface—Part 2:Protocol layer technical requirements GB/T 46280.3-2025 Specification for chiplet interconnection interface—Part 3:Datalink layer technical requirements GB/T 46280.5-2025 Specification for chiplet interconnection interface—Part 5:Physical layer technical requirements based on 2.5D package

Referenced Standards

GB/T 46280.1-2025 Specification for chiplet interconnection interface—Part 1:General principles

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