T/IAWBS 005-2018 Abolished Group standards

T/IAWBS 005-2018 6-inch silicon carbide single crystal polished wafer

T/IAWBS 005-2018 6-inch silicon carbide single crystal polished wafer

Publish Date: 2018-12-06 Implement Date: 2018-12-17 For services related to genuine standard inquiry, procurement, translation, and other related services in China, please Contact Us
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Basic Information

Standard Code: T/IAWBS 005-2018
Standard Type: Group standards
Standard Status: Abolished
is_force_gb: no
CCS Name: Compound semiconductor materials
ICS Name: Semiconductor materials
Publish Date: 2018-12-06
Implement Date: 2018-12-17

Scope

Scope: This standard specifies the necessary related terms, product classification, technical requirements, test methods, inspection rules, and marking, packaging, transportation, and storage for 6-inch 4H and 6H silicon carbide single-crystal polished wafers. This standard applies to silicon carbide polished wafers prepared by single- or double-sided polishing of 6-inch 4H and 6H silicon carbide single-crystal abrasive wafers. The products are mainly used as substrate materials for the production of semiconductor lighting, power electronic devices, and microwave devices. Main technical content: This standard applies to silicon carbide polished wafers prepared by single- or double-sided polishing of 6-inch 4H and 6H silicon carbide single-crystal abrasive wafers. It specifies the necessary related terms, product classification, technical requirements, test methods, inspection rules, and marking, packaging, transportation, and storage for 6-inch 4H and 6H silicon carbide single-crystal polished wafers. This standard stipulates that the crystal orientation of the silicon carbide polished wafers is <0001>, and the orthogonal crystal orientation deviation of the surface of the silicon carbide polished wafers is: a) Positive crystal orientation: 0° ± 0.5°; b) Deviated crystal orientation: The crystal orientation deviation of the silicon carbide polished wafers is deviated towards the [1120] direction along the main positioning edge of the wafer surface by 4° ± 0.5° or other angles. At the same time, this standard also stipulates the content of surface defects, microtube density, crystallization quality, resistivity, polymorphism, and dislocation density, etc.

Development Information

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